The present invention relates to method of fabricating semiconductor devices, and more particularly to fabrication methods of forming polycrystalline silicon layers suitable for use as electrodes for capacitors.
In recent years, the memory cell size has been reduced accompanying the increase in the degree of integration of DRAMs, and along with it the area of storage capacitors used for the cells tends to be decreased. For this reason, stacked capacitors or trench stacked capacitors that have a large effective area for the capacitor part, an excellent .alpha.-ray resistance characteristic and a small interference between the capacitor parts have been employed in order to secure sufficiently high capacitances. However, for 64 Mbit DRAMs now under development each cell area is anticipated to become smaller than 1.5 .mu.m.sup.2, so that there is required a capacitor insulating film with a thickness of less than 50 .ANG. when converted to equivalent thickness of silicon dioxide (SiO.sub.2) film, even with the use of the aforementioned structures. It is extremely difficult to form such a thin capacitor insulating film uniformly and without defect all over the chip.
In order to resolve the above-mentioned problem, there is conceived an idea of increasing the effective areas of the opposing electrodes of a capacitor by providing a micro roughness on the surface thereof to obtain a larger electrostatic capacity for a capacitor of the same size. A method for increasing the opposed electrode areas, that is, for enlarging the effective surface areas, of polycrystalline silicon electrodes is disclosed in "Capacitance-Enhanced Stacked-Capacitor with Engraved Storage Electrode for Deep Submicron DRAMS," Solid State Devices and Materials, 1989, pp 137-140. According to this method, the surface of a polycrystalline silicon is coated with spin-on-glass (SOG) containing photoresist particles. Then the effective surface area of the polycrystalline silicon film is increased by providing a micro roughness on the surface thereof by etching the SOG film, whereby etching the polycrystalline silicon surface using the resist particles as the mask.
However, this method has the following problems. Namely, there are required strict control of the size of the resist particles and distribution of the resist particles on the wafer with uniform density at the time of coating, in addition to the complexity of the process involved.